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7.4.3 Bit 5
This bit is ‘0’.
7.4.4 Bit 4 (IDNF)
This bit is set if the requested sector ID is in error or cannot be found.
7.4.5 Bit 3
This bit is ‘0’.
7.4.6 Bit 2 (Abort)
This bit is set if the command has been aborted because of a Drive status condition (Not Ready, Write Fault,
etc.) or when an invalid command has been issued.
7.4.7 Bit 1
This bit is ‘0’.
7.4.8 Bit 0 (AMNF)
This bit is set when there is a general error.
Table 29: Erro r Register
D7
BBK
D6
UNC
D5
0
D4
IDNF
D3
0
D2
ABRT
D1
0
D0
AMNF
7.5 Feature Register
The Feature register is a write-only register, located at address 1F1h [171h], offset 1h, Dh.
This write-only register provides information on features that the host can utilize. It is accessed on data
bits D15 to D8 during a write operation to Offset 0 with – CS1 Low and – CS0 High.
7.6 Sector Count Register
The Sector Count register is located at address 1F2h [172h], offset 2h.
This register contains the number of sectors of data to be transferred on a read or write operation between
the host and Drive. If the value in this register is zero, a count of 256 sectors is specified. If the command
was successful, this register is zero at completion. If not successfully completed, the register contains the
number of sectors that need to be transferred in order to complete the request. The default value is 01h.
7.7 Sector Number (LBA 7-0) Register
The Sector Number register is located at address 1F3h [173h], offset 3h.
This register contains the starting sector number or bits 7 to 0 of the Logical Block Address (LBA), for any
data access for the subsequent sector transfer command.
7.8 Cylinder Low (LBA 15-8) Register
The Cylinder Low register is located at address 1F4h [174h], offset 4h.
This register contains the least significant 8 bits of the starting cylinder address or bits 15 to 8 of the Logical
Block Address.
7.9 Cylinder High (LBA 23-16) Register
The Cylinder High register is located at address 1F5h [175h], offset 5h.
This register contains the most significant bits of the starting cylinder address or bits 23 to 16 of the Logical
Block Address.
7.10 Drive/Head (LBA 27-24) Register
The Driver/Head register is located at address 1F6h [176h], offset 6h.
The Drive/Head register is used to select the drive and head. It is also used to select LBA addressing instead
of cylinder/head/sector addressing. The bits are defined in Table 30 .
Swissbit AG
Industriestrasse 4
Swissbit reserves the right to change products or specifications without notice.
Revision: 1.00
CH-9552 Bronschhofen
Switzerland
www.swissbit.com
industrial@swissbit.com
P-120_data_sheet_PA-QxBO_Rev100.doc
Page 33 of 76
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